Monocrystalline silicon wafers market share expected to reach nearly 75 percent in 2020 and continue to grow, ITRPV report finds

The Germany-based Mechanical Engineering Industry Association (Verband Deutscher Maschinen- und Anlagenbau – VDMA) representing around 3300 German and European companies in the mechanical engineering industry, announced the release of the 11th edition of the International Technology Roadmap for Photovoltaic (ITRPV) report, which summarizes over 100 parameters along the c-Si PV value chain in numerous charts and discusses the results.

Fifty-seven leading international poly-Si producers, wafer suppliers, crystalline-Si (c-Si) solar cell and module manufacturers, PV equipment suppliers, and production material providers, as well as PV research institutes and consultants jointly provided the data basis for this edition.

The cumulated PV-module shipments surpassed 650 GWp in 2019 and the price experience curve with its historical learning continued at a learning rate of 23.5 percent.

According to the findings, the PV industry will keep this learning rate up over the next years by continuing the linking of cost reduction measures with the implementation of cell perfections, with enhanced and larger silicon wafers, improved cell front and rear sides, refined layouts, introduction of bifacial cell concepts, new cell and improved module technologies.

The market share of monocrystalline silicon (mono-Si) wafers in 2020 will be close to 75 percent and will continue to grow. In contrast, the market share of multicrystalline silicon (mc-Si) wafers will shrink continuously from about 20 percent in 2020 down to only 5 percent until 2030. The 2019 dominating wafer format of 156.75 x 156.75 mm² will disappear within the next 3 years and will be replaced fast by larger formats. Future mainstream will be formats of 166.0 x 166.0 mm² (M6) or even larger ones like 210.0 x 210.0 mm² (M12).

The continued roll out of PERC cell technology and the implementation of half-cell module technology enabled higher performing module products in 2019. Due to the current diversification in wafer formats, module dimensions are also changing. The comparison of different module types only by the common module label power may be misleading as module powers of ≥ 500 Wp are possible today with existing cell technologies by using larger wafer formats. Module area efficiency (module label power divided by module area in m²) is therefore a helpful parameter to compare different module types and module technologies.

PERC p-type mono-Si modules show an average area efficiency of 203 W/m² in 2020. This will increase to 225 W/m² in 2030. Modules with n‑type cell concepts, especially those using tunnel oxide passivation technologies, are expected to be ahead of p-type PERC with 208 W/m² in 2020 and with up to 230 W/m² until 2030. HJT modules reach area efficiencies of 210 W/m² in 2020 and are expected to outperform other c‑Si module types with close to 240 W/m² within the next 10 years.


Source: Press release by VDMA. Photo credit: U.S. Department of Energy via Flickr (U.S. Government Works).